September
23-25, 2009, Metropolitan Hotel, Vancouver, BC, Canada
CMOS
Emerging Technologies Workshop is a research and business event
for those who want to discuss new and exciting high
tech opportunities. The talks resemble in-depth
tutorials that describe state-of-the-art technology and future
research directions rather than presenting specific research results
or commercial products. The 6th
annual workshop will be held in downtown Vancouver with numerous
opportunities for personal exploration of the surrounding tourist
attractions.
No formal proceedings
will be printed but attendees will receive PDF copies of all
presentation material. Selected and expanded workshop papers are
edited as books with the following titles already published or in
preparation:
8:00-8:30
John Rogers, University of Illinois at
Urbana-Champaign, Stretchable Si CMOS: From
Electronic Eyeball Cameras to Conformal Brain Monitors
8:35-9:05 Bernhard
Boser, boser@eecs.berkeley.edu, Berkeley, Point-of-care Infectious
Disease Test based on CMOS Technology
Present medical tests rely on a
sophisticated laboratory infrastructure that substantially adds to time
required and cost of tests. Testing is also unavailable in setting without
ready access to labs and existing facilities may be overloaded in the case of
sudden outbreaks. Present point-of-care tests based on simple passive chromatography
lack the sophistication and accuracy of laboratory tests and are therefore not
a viable substitute. We propose a new testing platform that harnesses the high functionality
and versatility of electronics and the low cost of CMOS integration in a
reliable and simple to use fully-contained test. The assay principle duplicates
the high specificity of antibody-antigen binding that is used in present
laboratory tests to achieve high accuracy. The enzymatic labels used in ELISA
(Enzyme Linked ImmunoSorbent Assay) are been substituted for magnetic beads
labels that can be both manipulated and detected electromagnetically. Consequently,
sample preparation and analyte detection can be performed on-chip without the
need for laboratory equipment or intervention by a trained technician.
9:10-9:40 Ian McWalter, President and CEO, CMC
Microsystems, www.cmc.ca, Embedded Intelligence: A key enabler in
Microsystems Applications
While it was first mooted in
the mid 90s, the definition of microsystems adopted by the European Commission
Fourth Framework program that “microsystems are integrated, intelligent
miniaturized devices and systems fabricated using processes compatible with
semiconductor ICs, and combining sensing with computation and actuation” is
still valid in many ways. However, the activities over the intervening 15 years
as we have progressed to ‘more than Moore’, have extended our views. The
concepts of heterogeneous systems, implemented in very small form factors at
extremely low power levels have extended through ICT and into health care, the
environment, automotive,aerospace and
energy applications among many others. In addition the forms of integration
have developed notions of compatibility beyond the semiconductor process.This talk will outline some major steps in
the evolution of microsystems, the value that has been provided in a variety of
applications and the current state of the art. The concept of embedded
intelligence, particularly in wireless autonomous systems, will be emphasised
as a key enabler in the delivery of value along with the some of the packaging
and test techniques that are vital to effective integration and
manufacturability.
10:00-10:20
Moisés Piedade, msp@inesc-id.pt,
Technical University of Lisbon, Micro
BioelectronicsSystems:ICONS – Intracortical Neuronal Stimulator and
BIOMAGCMOS – Magnetic CMOS Biochip
10:25-10:45
Shantanu Chakrabartty, shantanu@egr.msu.edu, Michigan State University, Forward
error-correcting Biosensors - hybrid Bio-CMOS circuits and systems
Even though achieving high sensitivity in
pathogen detection has been one of the main goals in biosensor research, the
reliability of detection is an area that has been typically overlooked. In this
talk, I will present some of the work being done by our group in the area of
forward error correcting (FEC) biosensors where we exploit the computational
redundancy offered by a high-density biosensor array to achieve
high-reliability in multi-pathogen detection reliability. At the core of this
approach is a hybrid bio-CMOS system where error-control coding and signal
amplification is performed at the biomolecular molecular level, whereas
decoding and signal processing is performed at the CMOS level. The focus of
this talk will be on conductometric biosensors based on our previous work on
lateral flow immunoassay and our current work using interdigitated electrode
arrays.
10:50-11:10
Sandro Carrara, sandro.carrara@epfl.ch, EPFL, IC Architectures and Nano-Structured
Electrodes for Applications in Personalized Therapy
Personalized therapy
requires accurate and frequent monitoring of the metabolic response by treated
patients. In case of high risk side effects, e.g. therapies with interfering
anti-cancer molecule cocktails, direct monitoring of the patient’s drugs
metabolism is essential as the metabolic pathways efficacy is highly variable on
a patient-by-patient basis. Currently, there are no fully mature point-of-care
bio-sensing systems for drugs metabolism monitoring directly in blood. To
develop low-cost Point-of-care technology, the development of dedicated IC
circuits is highly required. The aim of the present talk is to show solutions
to develop point-of-care systems for drugs monitoring in personalized therapy.
P450 enzymes are the considered probe molecules as they are key proteins
directly involved in drugs metabolism of humans. Sensitivity improvement is
ensured by means of enzyme integration onto electrodes structured with carbon
nanotubes. Different CMOS designs are compared toward IC bio-chip developments.
Results show that not all the CMOS circuitries proposed by literature are
suitable for the aim and that special ASIC architectures are required to
develop P450 based point-of-care devices for monitoring in personalized therapy.
11:15-11:35
Luke Theogarajan, ltheogar@ece.ucsb.edu, UCSB, CMOS for Biomedical
Applications
Retinal prostheses are being developed
around the world in hopes of restoring useful vision for patients suffering
from certain types of diseases like Age Related Macular Degeneration (AMD) and
retinitis pigmentosa. The central component of an electrical retinal prosthesis
is a wirelessly powered and driven stimulator chip. The chip receives commands
from the outside and outputs biphasic current pulses to an electrode array
placed in the retina that stimulate the remaining retinal neurons. The chip
contains 30,000 transistors in a 0.5µm technology (3M, 2P), occupies an area of
2.3mm×2.3mm and excluding the current sources consumes less than 2mW of power.
The implant has been shown to work successfully in Yucatan mini-pigs while
being powered and commanded wirelessly. I will conclude my talk by
briefly touching on the progress we have made on wireless power delivery,
area-efficient LNA design, A/D conversion and CMOS-based sensors in the context
of biomedical applications.
11:40-12:00
Masaharu Imai, imai@ist.osaka-u.ac.jp, Hirofumi Iwato, Keishi Sakanushi,
Yoshinori Takeuchi, Osaka U, Akira
Matsuzawa, Tokyo Institute of Technology,
Yoshihiko Hirao, Nara Medical University,
MeSOC-I: a Mixed Signal SOC for Bio-instrumentation in Medical Treatment and
Health Care
Bio-instrumentation plays an important role
in the medical treatment and health care. It is desirable to perform the
bio-instrumentation in the daily life situation under the condition of
unrestraint, natural, less-invasive and long term measurement in a home, in
order to reduce the stress to human mind and body. Technical requirements to
such measurement systems can be summarized as: smaller size, lighter weight,
and less power consumption. This paper describes MeSOC-I (Medical
application oriented System On Chip type I) for
bio-instrumentation. The architecture of MeSOC-I has been designed to satisfy
the requirements from medical doctors to perform bio-instrumentation. One of
the most successful applications of MeSOC-I is the one to the in-plant
measurement system of inner pressure of urinary bladder. The sensing system
consists of a pair of sensing nodes and associated data transmitters. Collected
biological information is sent to and analyzed by another computer (typically,
a PC). A sensing node consists of a MEMS (Micro Electro Mechanical Systems)
pressure sensor, an MeSOC-I chip, a very small silver oxide battery, a coil
antenna, and some other discrete components, which is embedded in a small
capsule. Then MeSOC-I includes a CDC (Capacitance to Digital Converter), an
ultra low power micro-processor with ECC (Error Correcting Code) handling
function, RAM, ROM, a wireless communication module for electro-magnetic
induction.
12:05-12:25
Shuenn-Yuh Lee, ieesyl@ccu.edu.tw, National Chung Cheng
University, Wireless Communication Integrated
Circuits for Biomedical Systems: RF and Mixed-Signal Circuits
The Wireless Communication Integrated Circuits
for Biomedical Systems: RF and Mixed-Signal Circuits will be presented in this
lecture. Based on the well-development VLSI technology and RFIC/Mixed-signal IC
techniques, the RFIC circuits with CMOS process are introduced for home
telecare systems as well as a wireless power and data transmission
microstimulator are also presented. Moreover, there are many analog front-end
circuits including preamplifier, analog filter, and analog-to-digital converter
for bio_signal acquisition systems, will be introduced. What are the circuit
design and technology challenges in meeting biomedical system requirements? The
low-power circuits have been implemented in TSMC 0.18-mm/0.35-mm CMOS process to reveal the design
challenges.
Session 1B, Networking and Communications,
Chairs: Sara Bavarian, UBC,sbavaria@sfu.caand Joe Maier, jmaier@telus.net, Corinex
10:00-10:20
Sam Heidari, sam_heidari@ieee.org, Ikanos Communications, www.ikanos.com, Any Wire Home Networking: an Overview of Future Generation of
Home Networking Devices
The next frontier of data distribution is
home networking.Today, numerous means to
distribute data within the home exist, however for high quality video
distribution; new technologies are only recently emerging.New standards of 802.11n utilizing
multi-input multi-output technology are finally enabling the development of
wireless products for video distribution.Meanwhile in the wireline domain, the ITU-T standards organization, in
its initiative G.hn, is defining a common MAC and Physical Layer to address
communication over coaxial cable, powerline and phone line in home networking. This
presentation will outline:
1.existing
technologies for wiredand wireless home
networking - such as MoCA®, HomePNA™, powerline, and wireless LAN – and the
relevant trade-offs in utilizing powerline, phone line, coaxial cable and
wireless mediums for communication;
2.emergingtechnologies for wired and wireless home
networking,such as multi-input and
multi-output wireless technology and G.hn standards-based wire line
technologies, that are enabling high quality video distribution; and
3.products
that are meeting the challenges associated with video distribution utilizing
these emerging technologies.
10:25-10:45 Lawrence Chen, lawrence.chen@mcgill.ca
, McGill U, The Case for
All-Optical Signal Processing in Next-Generation Photonic Networks
There is a great deal of interest on
developing electronic and optical signal processing techniques for fiber optic
communications.Much of this effort
focuses on techniques to mitigate transmission impairments (e.g., nonlinear
effects, chromatic dispersion, and polarization mode dispersion) and to
increase the bit rate (i.e., overall carrying capacity).A number of electronic digital signal
processing techniques have been developed for transmitters and receivers and
have improved significantly system performance, especially in conjunction with
coherent detection.However, not all
signal processing functions can be implemented electronically.In particular, optical techniques are still
required for functions such as clock recovery, buffering/optical delays,
wavelength conversion, and 3R regeneration (reamplification, reshaping, and
retiming), especially at ultrahigh data rates (beyond 40 Gb/s).In this presentation, we examine all-optical
signal processing techniques with a specific focus on technologies/solutions
for performing all-optical clock recovery and tunable optical delays that are
capable of processing simultaneously more than one data channel.
10:50-11:10
Martin Maier, maier@emt.inrs.ca, INRS, Fiber-Wireless (FiWi) Access
Networks
Due to its unique properties, optical fiber
is likely to entirely replace copper wires in the near to midterm, paving all
the way to and penetrating into the homes and offices of residential and
business customers. This trend can be observed in most of today's greenfield
deployments where fiber rather than copper cables are installed for broadband
access. The final frontier of optical access networks is the seamless
convergence with their wireless counterparts, giving rise to bimodal
fiber-wireless (FiWi) broadband access networks. FiWi networks can be
categorized into widely studied radio-over-fiber (RoF) networks and recently
proposed radio-and-fiber (R&F) networks. In this talk, we outline the severe
limitations of RoF networks and elaborate on the benefits of their R&F
counterparts. We overview the state-of-the-art of FiWi networks and elaborate
on their techno-economic comparison and future challenges. Finally, we discuss
their potential to shift the current research focus from optical-wireless
networking to the exploitation of personal and in-home computing facilities as
we are about to enter the Petabyte age.
11:15-11:35 David Plant, david.plant@mcgill.ca, McGill
University, Burst-mode technologies for ultra-high bit rate, agile photonic
networks
Having experienced constant growth for
numerous decades, data rates on fiber optic networks are now poised to increase
dramatically to 40 Gb/s, and later 100 Gb/s. Beyond 100GE, projections suggest
500 GE is possible. In parallel Fiber-to-the-Home/Premise is necessary to meet
burgeoning residential and corporate user demands. The confluence of optical
transmission and optical network functions opens up new paradigms for network
architectures that are enabled by emerging photonic technologies.
Characteristics of these networks that distinguish them from existing ones
include networks in which the transmission of information is based on optical
packets (burst-switched or packet-switched networks, with and without
all-optical header recognition), and practical implementations for optical
signal processing. Furthermore, the bursty nature of these networks imposes new
design constraints on transmitters, receivers, and optical components. We
describe various system and technology considerations for such networks.
11:40-12:00
Eldad Perahia, eldad.perahia@intel.com, Intel Corporation, www.intel.com, Next Generation Wireless LAN
Technology: 802.11n and Very High Throughput
The primary standard for commercial wireless
local area networking is IEEE 802.11. IEEE 802.11n (High Throughput) builds
upon the existing standard and enhances the physical layer through MIMO,
spatial division multiplexing, and 40 MHz channels that, together with a few
other minor changes, enable data rates of up to 600 Mbps. It also enhances the
medium access control layer, primarily through the addition of aggregation
techniques and enhancements to the block acknowledgement protocol to achieve an
effective throughput in excess 400 Mbps.Due to the large installed base of legacy IEEE 802.11 devices, the
coexistence interoperability mechanisms provided by the standard are also
critical to its success.IEEE 802.11ac
and 802.11ad (Very High Throughput) will further advance wireless networking
throughput to beyond gigabit rates.802.11ac will explore using multi-user access techniques and wider
channels in the 5 GHz band for applications such as multiple simultaneous video
streams throughout the home.802.11ad
will take advantage of the large swath of available spectrum in the 60 GHz band
to develop a protocol to enable throughput intensive applications such as
wireless I/O or uncompressed video.
12:05-12:25
Allan
L. Silburt, asilburt@cisco.com, Adrian Evans,Ian Perryman,
Shi-Jie Wen, Dan Alexandrescu,Cisco,
www.cisco.com, Design for Soft
Error Resiliency in Internet Core Routers
This paper
describes the modeling, analysis and verification methods
used to achieve a reliability target set for transient outages in equipment used to build the backbone routing
infrastructure of the internet.We
focus on the ASIC design and analysis techniques that were undertaken to
achieve the targeted behavior using 65nm process technology.Using random fault injection in large scale
RTL simulations, and slack time
distributions from static timing analysis, estimates of functional and temporal
soft error masking effects were applied to a system soft error model to drive
decisions on interventions such as the choice of flip flops, parity protection
of registers groupings and designed responses to detected upsets.The key findings of this work are:
-random
fault insertion in ASIC RTL (Register Transfer Level) simulation is a tractable
solution to the problem of calculating logical and functional masking factors
in large silicon intensive systems
-in
addition to logical and functional masking effects, some
low cost interventions in design methodology
are shown to yield substantial benefits in making upsets detectable and
managing their impact.
-temporal
error masking effects can be conservatively derived from readily available
timing analysis data
-integrated
system modeling for SEU effects combined with a clear target specification can
enable a system to be designed with predictable and verifiable soft error
performance characteristics.
Lunch 12:30-13:30
Session 2A, Wireless, Chair: Reza
Mahmoudi, TU Eindhoven, r.mahmoudi@tue.nl
13:30-13:50
Dennis Sylvester, dennis@eecs.umich.edu, U of Michigan, Ultra-low voltage
circuits for ubiquitous sensing applications
This talk describes new integrated circuit
building blocks for emerging wireless sensing applications, particularly those
where volume and therefore power consumption constraints are orders of
magnitude below current state of the art. Developments in sub-nW
timekeeping circuits are described, along with extremely low leakage memories
and efficient DC-DC voltage conversion circuits at µA-level current
loads. Taken together, these circuit design advances point to a vision of
true mm^3 low-cost sensing nodes with hybrid power sources, i.e., scavenged +
microbattery, providing long lifetimes and reliable operation.
13:55-14:15
Jin Liu, jinliu@utdallas.edu, U of Texas at Dallas, Design
Challenges for Remotely Powered Systems
Remotely powered systems, such as RFID tags
and biomedical implants, are powered wirelessly by extracting power from
electromagnetic fields generated by a reader or an interrogator.This presentation will discuss IC design
challenges in such systems, specifically in power extraction, data
communication and data storage.More
detailed design in UHF band will be presented including multi-stage rectifier
design methodology, EEPROM programming techniques and nano-power, low-voltage
circuit design techniques.
14:20-14:40
Fei Yuan, fyuan@ee.ryerson.ca,
Ryerson U, Remote Frequency Calibration of Wireless Passive Microsystems
The reliability of data communications
between passive wireless microsystems and their base station is heavily
affected by the change of the environment in which these microsystems reside.
The operation of the baseband units and backscattering of a passive wireless
microsystem is typically controlled by its local oscillator. Although the
effect of supply voltage fluctuation and temperature variation on the frequency
of the oscillator can be compensated using on-chip compensation circuitry, its
effectiveness is largely hindered by the limited power resources available. An
alternative approach is to estimate the frequency of the local oscillator using
a timing signal provided by the base station and adjust the frequency of the
oscillator using a digital timing feedback loop. This approach, however,
suffers from the drawback of a long calibration time and th need for complex
logic circuitry. In this presentation, we will present a remote frequency
calibration method that allows a passive wireless microsystem to adjust the
frequency of its oscillator to that of the external injection signal using an
injection-locked phase-locked loop. A new integration self-injection approach
is also proposed to increase the lock range and hold the frequency of the
oscillator during data transmission where the external calibrating signal is
removed. The calibration system consumes significantly less amount of power as
compared with its digital counterparts. The details of system configuration,
circuit implementation, and measurement results will be presented.
CMOS receiver
performance has improved in the last several years with new architecture,
better circuit design and excess transistor performance enabled by scaled
technology.While a transceiver
typically costs less than $0.75, a front end module (FEM) typically costs more
than $1.00, several dollars in some cases.The greatest reduction in radio system cost comes from eliminating or
greatly simplifying the front end module.Smart phones, mobile internet devices and notebook computers have
multiple radios that can operate at the same time.Radios in these devices that are collocated
can also operate simultaneously.For
these reasons, high linearity receivers are necessary to lower cost and enable
coexistence and collocation while maintaining high performance.This presentation will address these
challenges and propose several solutions.
With
the explosive growth of Wi-Fi in recent years, wireless LAN transceivers are
now ubiquitous within notebook computers and are increasingly being integrated
into new platforms such as portable gaming devices and even mobile phones. In
addition, wireless LANs are evolving to accommodate other, more advanced
applications within the home and business, with the next-generation standard
defining highly complex multiple antenna designs to support greater range and
high-bandwidth applications like support for multiple streams of
high-definition video. Increasing complexity of these systems, combined with
the need to minimize power dissipation, cost and area has yielded a new
generation of devices that push the limits of mixed-signal design. New and
emerging applications such as mobile multimedia communications require higher
data rates as well as more robust links. A technique that can satisfy both
these requirements is the use of multiple-antenna systems. These systems range
from the simple antenna-diversity systems, to the very complex MIMO systems. A
medium-complexity alternative is a receiver with an RF combiner. These systems
have been attracting more attention in recent years. Here the first
single-weight combiner system in a wireless LAN SoC transceiver that meets the
demands of new mobile platforms while achieving a higher degree of integration
and better sensitivity is presented.
The mobile terminal market is characterized
by very large volumes, very short product development cycles, decreasing
product life times, and very low and rapidly declining product prices.These market characteristics make adoption of
a new technology a risky proposition particularly when there is little to no
high volume manufacturing and field performance data to demonstrate the
technology is proven and truly ready for insertion.Emerging 3G and soon, 4G, applications have intensified the requirements
for a new, disruptive technology to implement next generation mobile terminal
hardware particularly in the RF front-end of these devices.RF micro-electro-mechanical systems (RF-MEMS)
is one such technology.Deep integration
of RF-MEMS with high volume industry mainstream CMOS technology provides a
novel approach to accessing the numerous benefits enabled by micro-mechanical
devices while achieving the cost points and scalability required for success in
the mobile terminal market. State-of-the-art results from the implementation of
software tunable, digital, RF-MEMS circuits in 180nm CMOS will be discussed
from the perspectives of process, device, and product technology
integration.Future research directions
and product applications will also be presented to highlight areas of the
greatest challenges and opportunities.
Piezoelectric thin films have attracted
attention in recent years for the practical applications in
micro-electromechanical systems (MEMS), such as high-sensitive force sensors or
low-voltage actuators. For the development of the piezoelectric MEMS devices,
the main technical issues are deposition of the high-quality ferroelectric
films, especially PZT films, and the measurement of the piezoelectric
properties of thin films. Piezoelectric properties of the materials strongly
depend on their composition and orientation, however thin film piezoelectrics
show much different characteristics from conventional bulk ceramics. In this
presentation, we introduce the sputtering deposition of the PZT films on a
variety of the substrates, and the characterization of the piezoelectric
properties of them. Although some of the applications such as inkjet printer
head or gyro sensors have already commercialized using piezoelectric thin
films, there are a lot of potential applications in piezoelectric MEMS. I’ll
talk about the design, fabrication, characterization of the piezoelectric MEMS.
In the past decade, several
Microelectromechanical systems (MEMS)-based optical scanners have been
developed, but most of these scanners are based on reflective scanning using
micro-mirrors. These
scanners are capable of focal and raster scanning, and are actuated using
electrostatic or electromagnetic fields. Alignment and packaging of these
mirror scanners are challenging since the optical path gets
folded. To address this issue, our research group demonstrated dual-axis
scanning of a transmissive microlens using electrostatic and magnetic fields
for vertical and later scanning, respectively. This
talk will summarize our latest achievements and provide outlook for future
work.
14:45-15:05
Min-Feng Yu, mfyu@illinois.edu, University of Illinois at
Urbana-Champaign, Nanoscale Needle Probes for Targeted Drug Delivery into
Living Cells
Nanoscale electrode probes capable of
probing microenvironments provide exciting new opportunities for fundamental
and applied studies in cellular biology and neuron science.We report the fabrication and
characterization of long and straight needle nanoprobes for electrochemistry,
and the study of their applicability and behavior in microenvironments.The needle nanoprobe, with a nanoscale ring-shaped
Au electrode (~ 1000 nm2 in area) at the tip of the needle serving as the
active electrode, was used, with another metal-coated nanowire as a reference
electrode, for local electrochemical sensing inside isolated microdroplets
having volumes down to a few picoliters for the first time.It was further used to non-intrusively pierce
through cell membrane and to mechanochemically deliver a minute amount of
single quantum dots and biomolecules into specific compartments in living
cells.The combination of those unique
capabilities makes such needle nanoprobes powerful tools for studying single
living cells or single synapses of neurons.
15:10-15:30 Behraad Bahreyni, behraad@ieee.org, SFU, Employing
resonance for multi-transducer systems
It is expected that pervasive sensing will
affect the human life tremendously over the next decade. In many cases, the
sensory system needs to be as compact as possible while consuming little
energy. Micro-sensors can be successfully used in many of these applications.
However, many applications require sensing of multiple phenomena, necessitating
the need for multiple sensors and dedicated interface electronics for each
sensor. This talk is concentrated on how resonance resonators can be employed
as the primary sensing technique for all transducers on the chip, including
sensors, actuators, and frequency references. Each resonant sensor in such an
Integrated Multi-Transducer Systems (IMuTS) provides a frequency modulated (FM)
output, which is quasi-digital, robust against noise and interference, and can
be precisely measured. The immediate interface circuit for a resonator is an
oscillator, whose design can be shared among different devices. Using resonance
for sensing alleviates the need for having different transduction mechanisms
for individual devices on a chip and moves the focus from the fabrication
process to the mechanical and interface electronic design. Moreover, signals
from multiple resonant transducers can be easily multiplexed and transmitted
over a single communication channel. Examples of employing resonance for
sensing and actuation purposes are provided.
13:30-13:50
Urs O. Häfeli, uhafeli@interchange.ubc.ca, and
Katayoun Saatchi, UBC, (Pre)Medical
Imaging to Optimize Radiotherapy
Microspheres and nanospheres made from
biodegradable polymers are used for both controlled drug release and targeted
drug delivery. During the development of such particles it is beneficial to be
able to follow their fate in vivo,
both qualitatively and quantitatively. An elegant method of tracking the
particles over time from outside of an animal or patient consists of
radiolabelling them with a gamma-emitting radioisotope and then observing their
biodistribution with appropriate imaging methods such as single photon emission
computed tomography (SPECT). To allow for the imaging of biodegradable
microspheres, a derivative of the biodegradable polymer poly(L-lactide) was
prepared with a chelating group able to bind an imaging radioisotope.
Specifically, we synthesized the biodegradable polymer poly(L-lactide)
conjugated to a 2-bis(picolylamine) ligand. This chelating polymer was
radiolabelled with the gamma-emitting radioisotope technetium-99m (Tc-99m),
which is readily available and is the most used radioisotope in nuclear
medicine. The radiolabelling, radiochemical stability, and in vivo biodistribution of our microspheres sized 1 and 10 µm in
diameter will be presented. Potential imaging applications for the smaller
particles include liver and spleen imaging due to their uptake by the
reticuloendothelial system (RES) and for the larger particles lung perfusion
imaging or detection of deep vein thrombosis. Using SPECT/CT imaging, it was possible to
pinpoint the in vivo behaviour of our
microspheres in a dynamic way and with a minimal number of animals. The use of
Tc-99m radiolabelled biodegradable polymers and their imaging by SPECT/CT is
thus a practical pre-clinical tool for pharmaceutical investigations,
especially for the optimization of target organ uptake and tissue
concentrations. For therapeutic regimens with highly toxic drugs, such as
cancer therapy, imaging could become an integral part of the treatment
procedure. In this way, treatment efficiency could be quickly observed and
maximized, while toxic side effects are minimized.
13:55-14:15 Anna Celler, aceller@phas.ubc.ca, UBC, Medical Imaging with Radioisotope
Nuclear Medicine imaging techniques, SPECT
and PET, use molecules labeled with radioactive material to investigate
functions of a living organism. The talk will discuss the basic principles of
NM and present imaging systems that are currently used for patient scanning
together with some of the most important clinical applications. A short review
of the newest camera designs, small animal systems, and the discussion of the
role which NM plays in molecular imaging will end the talk.
14:20-14:40
Troy Farncombe, Hamilton Health Sciences,
Concurrent SPECT-MRI imaging
Concurrent SPECT/MRI Imaging
Over the last several years, diagnostic
medical imaging has been transformed through the introduction of combined
multi-modal imaging systems such as PET/CT and SPECT/CT that are able to
provide information of both 3D radiotracer distribution (depicting cellular
function) along with high resolution anatomical information in the same patient
at nearly the same time. With relatively simple image processing, this
information can then be presented to the interpreting physician in a clear and
concise manner. The use of functional radionuclide imaging combined with
the exquisite anatomical detail afforded with x-ray CT, has proven itself
valuable in oncological applications where the high sensitivity of radionuclide
imaging can be framed in the anatomical context of x-ray CT. However, in
applications requiring high soft-tissue contrast or functional assessments,
x-ray CT may not be the optimal imaging method. Rather, in these cases,
MR imaging may be more capable of providing the necessary tissue contrast or
additional information required and thus the combination of MR/PET or MR/SPECT
may have certain advantages or CT-based hybrid systems. New solid-state
detector materials now make it possible to incorporate highly sensitive
radionuclide imaging systems into high field MRI. A few of these approaches for
fulfilling the design goal of MR/PET or MR/SPECT will be described.
14:45-15:05 Jamal
Deen, jamal@mcmaster.ca, McMaster U,
CMOS electronics for medical imaging
15:10-15:30 R. Zoughi, zoughi@mst.edu, Missouri University of Science
and Technology (S&T), Microwave and Millimeter Wave Nondestructive Testing, Evaluation and
Imaging – Principles and Emerging Opportunities
Microwave and
millimeter wave nondestructive testing and evaluation techniques have been
around for more than two decades, yet their utility in many practical
environments have been limited due to unavailability of suitable hardware,
unfamiliarity of users with these methods, etc.These techniques have certain advantageous features that make them
uniquely applicable to many critical applications.In addition, imaging techniques at these
frequencies have received considerable attention in the past decade for a
variety of application including composite imaging, infrastructure health
monitoring, aerospace structural component imaging, contraband detection, to
name a few.Advancement in hardware
development for wireless technology has had a secondary positive effect of
making needed hardware/components at these frequencies much more readily
available than a decade ago.Consequently, this has resulted in a number of opportunities for taking
many of the ideas and systems that have been developed in various laboratories
into the market.In this talk the
underlying principles of these techniques will be presented along with several
specific commercial opportunities in the areas of real-time imaging and
inspection technologies.The imaging
opportunities have a wide range of applications including biomedical imaging
applications involving skin cancer and burned skin diagnostics.
15:50-16:10 Omeni Okundu, okundu.omeni@toumaz.com, Alison Burdett, Toumaz Inc.,www.toumaz.com, Challenges in Low Power
Communication Protocol Design & Implementation - A Sensium™ Case Study
Portable wireless body area network (WBAN)
applications in the healthcare and sporting/fitness sectors are seen as a huge
growth area. A key system decision for these applications is whether to use
standard or proprietary communication protocols for product development, to
meet the often-opposing goals of robust and reliable operation at very low
power and low cost. This talk presents a custom communication protocol targeted
at this particular application area, termed the Nanopower Sensor Protocol
(NSP). Key application requirements and design trade-offs are examined
during the implementation of the NSP protocol into the SensiumTM
ultra low power wireless sensor platform. The potential benefits of proprietary
over existing standard-based systems are also explored with real examples. In
the absence of a current standard targeted at this WBAN application area,
communication systems such as the NSP-enabled Sensium™ could provide the
optimal solution to meet both low power and connectivity requirements.
16:15-16:35Magdy Bayoumi, mab@cacs.louisiana.edu, U Louisiana, A Low Energy Efficient
Processor for Wireless Sensor Networks
Computers, communication, and sensing
technologies are converging to change the way we live, interact, and conduct
business. Wireless sensor networks reflect such convergence. These networks are
based on collaborative efforts of a large number of sensor nodes. They should
be low-cost, low-power, and multifunction. These nodes have the capabilities of
sensing, data processing, and communicating. Sensor networks have a wide range
of applications, from monitoring sensors in industrial facilities to control
and management of energy applications to military and security fields. Because
of the special features of these networks, new network and sensor node
technologies are needed for cost effective, low power, and reliable
communication. These network protocols and node architectures should take into
consideration the special features of sensor networks such as: the large number
of nodes, their failure rate, limited power, high density, etc. In this talk
the impact of sensor node processor architectures will be addressed, several
commercial examples will be discussed. The main trends of the research efforts
in the area will be addressed. A case study of a custom design sensor processor
that took place at the Center for Advanced Computer studies will be
highlighted.
16:40-17:00
Mona Hella, hellam@ecse.rpi.edu,
RPI, Tunability in RF Oscillators
with Fixed Resonators for Multi-Standard Radios
New standards such as software defined
radios (SDR) and cognitive radios (CR) will reshape the wireless market in the
next few years. The common features of such systems are frequency agility,
whether wideband and/or multi-band operation and reconfigurability to adapt to
different standards. In this talk, we will review recent advances in the design
of multi-band oscillators. We will introduce two alternative techniques for
multi-band oscillators that alleviate the need for direct switching of the tank
parameters in traditional multi-band oscillators. First, we propose the use of
double-tuned, double-driven transformers for the realization of dual band
oscillators. We derive the conditions required to start oscillations for
single-driven and double-driven, double-tuned transformers, explaining the
nature of the band-switching mechanism. We also look at the relation between
the coupling factor, frequency band separation, and quality factor at the two
frequency bands from various perspectives. Second, we move the band switching
mechanism from the tank to the oscillator core by introducing the new concept
of band-limited negative resistance. We support our findings with measurement
results from fabricated prototypes in silicon and GaAs technologies.
17:05-17:25
Tae Wook Kim, taewook.kim@yonsei.ac.kr, Yonsei U, Multi-Standard Mobile
Broadcast Receiver LNA with Integrated Selectivity and Novel Wideband Impedance
Matching Technique
A CMOS LNA supporting multiple mobile
video standards (MediaFLO, DVB-H, and ISDB-T) is implemented using a 0.18 µm
CMOS process. The LNA uses a novel feedback configuration and implements an RF
elliptic low pass filter (LPF) response. Because of this elliptic LPF
response, the receiver is able to operate concurrently with radio transmitter
leakage from GSM, DCS, WLAN and Bluetooth. The design decouples the feedback
path from the main path to allow integration of the LPF as well as obtain
wideband input matching.
This presentation reviews transmitter
topologies for wireless transceivers. First it describes different types of
modulations under two main categories of constant and variable envelope
modulations. Then, it introduces different transmitter architectures commonly
used in today’s wireless solutions.This
covers the Cartesian transmitter and its variants, direct VCO modulation,
translational loops and finally polar transmitters. Finally, some examples of
radio transmitter in real world applications are provided.
17:55-18:15Daquan Huang, huangdq@gmail.com, Frank Chang, UCLA, CMOS Terahertz Signal Generation and
Application
A low Terahertz (324GHz)
frequency generator is realized in 90nm digital CMOS by linearly superimposing
four phase shifted fundamental signals at one fourth of the output frequency
(81GHz). The technique minimizes the fundamental, second and third harmonics
without additional filtering and results in a high fundamental-to-fourth
harmonic signal conversion ratio of 0.17 or -15.4dB. The demonstrated prototype
circuit produces a calibrated output power of -46dBm when biased at 1V with
12mA. The output signal is measured to have frequency tuning range of 4GHz with
extrapolated phase noise of -91dBc/Hz at 10 MHz frequency offset.
15:50-16:10 Marcel Kossel,
mko@zurich.ibm.com, IBM Zurich Research Laboratory, www.zurich.ibm.com, Design of
source-series-terminated transmitters with T-coils
A
source-series-terminated (SST) transmitter in a 65 nm bulk CMOS technology is
presented. The circuit exhibits an eye height greater than 1.0 V for data rates
of up to 8.5 Gb/s. A thin-oxide pre-driver stage running at 1.0 V drives 22
parallel connected thick-oxide SST output stages operated at 1.5 V. The SST
transmitter has a 5-bit 2-tap FIR filter whose adaptation is independent of the
impedance tuning. To achieve a return loss of <–16 dB up to 10 GHz a 40 µm ×
40 µm T-coil is used at the transmitter output. The application of capacitive
source-degenerated clock buffers help achieve a duty-cycle restoration
capability of 5x, and the common-mode voltage noise is below 10 mV rms for
high-, mid- and low-level terminations. The chip consumes 96 mW at 8.5 Gb/s and
occupies 180 mm × 360 mm. In addition to the transmitter design, guidelines for
the T-coil design are presented.
16:15-16:30 Patrick Yue, cpyue@ece.ucsb.edu, UC Santa Barbara, Very low-power,
continuous-time adaptive passive equalizers for high-speed I/Os
As the data
rate and wire density continue to increase for chip-to-chip communication,
equalization circuits have become indispensable to high-speed transceiver. The
major challenge is to compensate high-frequency chip-to-chip channel losses
with low power consumption. A very-low-power continuous-time adaptive equalizer
has been designed utilizing a passive tunable filter to overcome this
challenge. The passive filter offer substantial power saving compared to
conventional active filters. The proposed equalization scheme does not require
a recovered clock and hence it can be inserted at the front-end of existing
high-speed receivers to boost the maximum data throughput. A prototype was
implemented in a 90-nm digital CMOS process. Measurement results show that the
equalizer can provide up to 13 dB of gain compensation with 6 dB of tuning
range while consuming less than 1 mW from a 1-V supply. The equalizer is able
to open the data eye of a 12-Gb/s PRBS signal after an 8-inch FR-4 channel,
which has 13 dB of attenuation at 6 GHz.
This
paper presents a robust 6×OSR receiver for 0.2-2Gb/s binary NRZ
signals, introducing an adaptive equalizer that is auto-calibrating on sample
data statistics. The proposed time domain analysis obtained with the
oversampling architecture is used to tune the equalizer. The auto-calibration
scheme is fully implemented in the digital domain, resulting in a hardware and
power efficient architecture. This highly digitized receiver is demonstrated in
0.18µm CMOS technology and is able to equalize cable losses up to 22dB@1GHz.
The self-adaptive equalizer solution occupies only 0.05mm2
and consumes 9mW from a 1.8V supply and can handle up to 20m 100-?
STP cable at 2Gb/s.
17:05-17:25
Byungsub Kim, byungsub@mit.edu, Vladimir Stojanovic, MIT, Energy
Efficient Wireline Communication Over RC-dominant Channels
A modern computing system requires high
speed data communication over short and dense RC-dominant channels under tight
budget of area and energy. Traditionally, equalization is widely used in
LC-dominant channels but not efficient enough for new emerging RC-dominant
channels. Equalization circuits addressing RC-dominant property can
significantly improve the energy efficiency over the traditional design. We
present new low power equalization circuit techniques suitable for RC-dominant
channels.
17:30-17:50
Koon-Lun Jackie Wong, klwong@broadcom.com, Broadcom, www.broadcom.com,
Edge and Data Equalization of Serial-Link Transceivers with Adaptation
Algorithm
Limited channel bandwidth introduces
inter-symbol interference (ISI) at both data and edge samples. In addition to
the ISI at data samples, ISI at the edge samples (edge ISI) increases the bit
error rate (BER) by degrading on the eye diagram and increasing the jitter of
the clock and data recovery (CDR). This work proposes a forward FIR equalizer
and a decision-feedback equalizer (DFE) that compensate for both data and edge
samples. To adapt both the data and edge equalizers, a modified LMS adaptation
algorithm is introduced to achieve convergence. A transmitter and receiver are
implemented in 0.13mm and 0.18mm technologies respectively. The edge ISI is
improved by 20% and the jitter is improved by 10% in measurement. The link
operates over a 120” FR4 channel with 24dB attenuation at Nyquist frequency,
and the BER is below 10-14 at 3.6Gb/s
This study presents two types of low-voltage
differential signaling (LVDS) transmitters. Instead of using a differential
amplifier in the receiver, a pair of high-frequency response common-gate
amplifiers is employed to obtain a high-speed operation. The experimental
results show that this circuit can operate up to 2 Gb/s with a 3.3-V power
supply. The power consumption is 32.8 mW. The second LVDS transmitter is a
low-voltage circuit. The input of the receiver is ac coupling. A negative
feedback loop is used in the receiver to control the input common-mode voltage
level. This circuit can operate up to 1 Gb/s with a 1-V power supply. The power
consumption is only 10.6 mW.
Marios Papaefthymiou, marios@umich.edu, U of Michigan, Resonant Clocking for Low-Power GHz-Speed VLSI
15:50-16:10
Olivier Trescases, ot@ele.utoronto.ca, U of Toronto, Low-Power Blocks for DC-DC Converters in Portable
Applications
Every microjoule extracted from the battery
must be carefully managed in today's multitasking portable electronics devices.
At the heart of this effort is the high-efficiency dc-dc converter that
provides tightly regulated supply voltages to the various mixed-signal ICs.
These miniature power converters are increasingly relying on flexible digital
or mixed-signal control loops to achieve high performance, while taking full
advantage of CMOS scaling. The quest for ever-increasing switching frequencies
has translated to impressive reductions in converter size and has allowed new
levels of passive integration, however it has also presented serious challenges
for the implementation of low-power blocks used in the closed-loop converter.
This talk will review the tradeoffs in the scaling of highly integrated CMOS
dc-dc converters. Results from several working prototypes will be presented,
including a charge-pump DAC for mixed-signal peak current-mode control,
sensorless current-mode control, and a DLL for low-power DPWM.
Reducing power consumption has become a
significant goal for any electronic device manufacturer. In the new era of
"Nano" sized components with small and ever shrinking geometries, the
issue of efficient and accurate power supplies cannot be overlooked or treated
as an afterthought. The challenge is highly magnified for portable
electronic devices where battery life is an utmost important condition.
Now, power supplies and power management solutions in general must be taken
into consideration at the beginning of a project, not at the end. In this
talk an overview of basic power supply solutions for portable devices is
presented to highlight their advantages or shortcoming.
16:40-17:00
Massimo Violante, massimo.violante@polito.it, Politecnico di Torino, Field
Programmable Gate Arrays: Challenges and solutions to use them in safety- or
mission-critical applications
Field Programmable fate Arrays (FPGA)
promise impressive breakthroughs, as they allow shortening the time-to-market
and reduce significantly the development costs. However, their usage in safety-
or mission-critical applications is still limited, in particular for those
devices like SRAM-based FPGAs from which designers can have the most of the
benefits. In this paper we will address the challenging designers have to face
to develop safety- or mission-critical applications using SRAM-based FPGAs, and
we will present some enabling technologies to make they use possible.
17:05-17:25 Joachim
Becker, Joachim.Becker@uni-ulm.de,
Institut für Mikroelektronik, Ulm, A
hexagonal lattice field programmable analog array (FPAA) for rapid prototyping
of Gm-C filters
This talk reports on a Field Programmable
Analog Array (FPAA) for high-frequency continuous-time analog ?lters. A
rapid-prototyping hardware is presented, which implements a hexagonal lattice
topology of 55 tunable Gm cells for recon?gurable instantiation of Gm -C ?lters
in a 0.13 µm CMOS technology. The chip structure allows intuitive mapping of Gm
-C ?lter schematics with up to 7 independent nodes, immediate download to the
hardware, and evaluation on the working prototype. Implementations of various
different low-pass and band-pass ?lters of different order show the feasibility
of the array for frequencies up to the order of one hundred MHz. In addition to
the intuitive manual mapping of ?lter schematics to the chip structure, a
genetic algorithm with hardware in the loop is used for synthesis of transfer
functions.
17:30-17:50 Abbes Amira, Abbes.Amira@brunel.ac.uk, Brunel U, Power Management and Modeling
on Reconfigurable Hardware for Imaging
Power dissipation
has become a key design issue in Field Programmable Gate Array (FPGA) based
architectures. Mobility, battery limitations, thermal constraints, reliability
issues, cost of cooling sub-systems and achieving time to market within these
design constraints has necessitated the adoption of power aware design flows.
Estimation of power at various stages of design gives the designer critical
information regarding the efficacy of optimisation strategies for saving power
and energy. In this presentation a range of Intellectual Property (IP) cores
including Discrete Wavelet Transform (DWT), Finite Ridglet Transform (FRIT) and
Finite Radaon Transform (FRAT) will be used to demonstrate a novel mathematical
analysis approach for functional level power analysis and modelling that
estimates with reasonably accuracy power and energy metrics.The application of medical image analysis
will be presented to demonstrate the use of the selected IP cores.
17:55-18:15Timothee Levi, tim.levi@wanadoo.fr, Takashi Kohno, U of Tokyo, Silicon Neural Network Circuits for
Smart-MEMs Systems
Silicon neuron is an electrical circuit that
is analogous to biological neurons. Different levels of modeling exist from the
neuron physiology to the plasticity of large neuron networks. Dr. Kohno
proposed a new design method that uses mathematical knowledge on neuronal
phenomena, which allows us to design simple circuitry whose operating
mechanisms as same as biological neurons. The main aim is to build silicon
neurons and synapses, based on this modeling, to create silicon neural
networks. Those will be applied to smart-MEMS system that can operate
autonomously and robustly without any specific programs.
